The present invention relates to semiconductor devices, and more specifically, to spacer formation on semiconductor devices.
The MOSFET is a transistor used for amplifying or switching electronic signals. The MOSFET has a source, a drain, and a metal oxide gate electrode. The metal gate is electrically insulated from the main semiconductor n-channel or p-channel by a thin layer of insulating material, for example, silicon dioxide or glass, which makes the input resistance of the MOSFET relatively high. The gate voltage controls whether the path from drain to source is an open circuit (“off”) or a resistive path (“on”).
N-type field effect transistors (nFET) and p-type field effect transistors (nFET) are two types of complementary MOSFETs. The nFET uses electrons as the current carriers and with n-doped source and drain junctions. The pFET uses holes as the current carriers and with p-doped source and drain junctions.
Typically the gate stacks of MOSFET devices have spacers comprising a nitride or oxide material that are arranged adjacent to sidewalls of the gate stacks.
As the scale of MOSFET devices continues to decrease, fabricating effective devices becomes more challenging.